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| BCR 129 NPN Silicon Digital Transistor Preliminary data * Switching circuit, inverter, interface circuit, driver circuit * Built in bias resistor (R1=4.7k) Type BCR 129 Marking Ordering Code WVs Q62702- Pin Configuration 1=B 2=E 3=C Package SOT-23 Maximum Ratings Parameter Collector-emitter voltage Collector-base voltage Emitter-base voltage Input on Voltage DC collector current Total power dissipation, TS = 102C Junction temperature Storage temperature Symbol Values 50 50 5 20 100 200 150 - 65 ... + 150 mA mW C Unit V VCEO VCBO VEBO Vi(on) IC Ptot Tj Tstg Thermal Resistance Junction ambient 1) RthJA RthJS 350 240 K/W Junction - soldering point 1) Package mounted on pcb 40mm x 40mm x 1.5mm / 6cm2 Cu Semiconductor Group 1 Nov-26-1996 BCR 129 Electrical Characteristics at TA=25C, unless otherwise specified Parameter Symbol min. DC Characteristics Collector-emitter breakdown voltage Values typ. max. Unit V(BR)CEO 50 10 - V IC = 100 A, IB = 0 Collector-base breakdown voltage V(BR)CBO 50 IC = 10 A, IB = 0 Base-emitter breakdown voltage V(BR)EBO 5 IE = 10 A, IC = 0 Collector cutoff current ICBO 100 nA 120 630 V 0.3 1 1.1 13 k VCB = 40 V, IE = 0 DC current gain hFE VCEsat Vi(off) 0.4 IC = 5 mA, VCE = 5 V Collector-emitter saturation voltage 1) IC = 10 mA, IB = 0.5 mA Input off voltage IC = 100 A, VCE = 5 V Input on Voltage Vi(on) 0.5 IC = 2 mA, VCE = 0.3 V Input resistor R1 7 AC Characteristics Transition frequency fT 150 3 - MHz pF - IC = 10 mA, VCE = 5 V, f = 100 MHz Collector-base capacitance Ccb VCB = 10 V, f = 1 MHz 1) Pulse test: t < 300s; D < 2% Semiconductor Group 2 Nov-26-1996 BCR 129 DC Current Gain hFE = f (IC) VCE = 5V (common emitter configuration) Collector-Emitter Saturation Voltage VCEsat = f(IC), hFE = 20 10 3 - 10 2 mA hFE 10 2 IC 10 1 10 1 10 0 10 0 10 -1 -1 10 10 0 10 1 mA 10 -1 0.0 0.1 0.2 0.3 V IC 0.5 V CEsat Input on Voltage Vi(on) = f(IC) VCE = 0.3V (common emitter configuration) Input off voltage Vi(off) = f(IC) VCE = 5V (common emitter configuration) 10 2 10 2 mA mA IC 10 1 IC 10 1 10 0 10 -1 10 0 10 -2 10 -1 -1 10 10 0 10 1 V 10 -3 0 1 2 3 V 5 V i(on) V i(off) Semiconductor Group 3 Nov-26-1996 BCR 129 Total power dissipation Ptot = f (TA*;TS) * Package mounted on epoxy 300 mW Ptot 200 TS TA 150 100 50 0 0 20 40 60 80 100 120 C 150 TA ,TS Permissible Pulse Load RthJS = f(tp) Permissible Pulse Load Ptotmax / PtotDC = f(tp) 10 3 10 3 K/W - RthJS 10 2 P totmax/PtotDC 10 2 D=0 0.005 0.01 0.02 0.05 0.1 0.2 0.5 10 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 D=0 10 1 10 0 10 -1 -6 10 10 -5 10 -4 10 -3 10 -2 10 s 10 tp -1 0 10 0 -6 10 10 -5 10 -4 10 -3 10 -2 10 s 10 tp -1 0 Semiconductor Group 4 Nov-26-1996 |
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